The background description provided herein is for the purpose of generally presenting the context of the disclosure. Work of the presently named inventors, to the extent the work is described in this background section, as well as aspects of the description that may not otherwise qualify as prior art at the time of filing, are neither expressly nor impliedly admitted as prior art against the present disclosure.
Generally, a phase-locked loop (PLL) includes a voltage-controlled oscillator (VCO) to generate an oscillating signal based on a voltage signal. The PLL is suitably configured to adjust the voltage signal to achieve a desired oscillating frequency. In a low noise application, the VCO is configured to have a relatively small gain (Kvco), which is a ratio of a frequency change over a voltage change, to reduce sensitivity to noise. During operation, environmental changes, such as a temperature drift, and the like, affect the oscillating frequency of the oscillating signal. To maintain the desired oscillating frequency, the PLL adjusts the voltage signal to compensate for the effects of the environmental changes. However, due to the relatively small gain, the voltage signal may exceed a voltage limit when the temperature drift is too large, for example, and the PLL may fail to keep the desired frequency.